UT Verification of Xiangshan Microarchitecture - Kunminghu Series

The Kunminghu architecture is an open-source, high-performance third-generation Xiangshan RISCV processor IP core developed by chisel

UT Practical Session 3: UT Verification Practice for 3rd-gen Xiangshan (Kunminghu) Architecture ITLB Module (In Progress)

Learning Xiangshan ITLB’s Microarchitecture Design Through Verification

Feb 19, 2025
Verification Case ITLB UT Verification

UT Practical Training Phase 2: Third Generation Xiangshan (Kunming Lake) Architecture IFU Module UT Verification Practice (In Progress)

Learning the microarchitecture design of Xiangshan IFU during verification.

Dec 11, 2024
Verification Cases IFU UT Verification

Phase 1: Kunminghu BPU module UT verification practice(Finished)

Learning the microarchitecture design of the Xiangshan BPU through verification

Jan 11, 2024
verification case BPU UT test

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